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Note for Computer Organisation and Architecture - COA By ANNA SUPERKINGS

  • Computer Organisation and Architecture - COA
  • Note
  • Anna university - ACEW
  • Information Technology Engineering
  • 5 Topics
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Course Material (Lecture Notes) How can the following impact performance? A selected algorithm? A programming language? A compiler? An operating system? A processor? I/O system/devices? Computer Architect must balance speed and cost across the system System is measured against specification Benchmark programs measure performance of systems/subsystems Subsystems are designed to be in balance between each other Usage: Normal: Data communications, time, clock frequencies Power of 2: Memory (often) Memory units: Bit (b): 1 binary digit Nibble: 4 binary digits Byte (B): 8 binary digits Word: Commonly 32 binary digits (but may be 64). Half Word: Half the binary digits of a word Double Word: Double the binary digits of a word Common Use: 10 Mbps = 10 Mb/s = 10 Megabits per second 10 MB = 10 Megabytes 10 MIPS = 10 Million Instructions Per Second Moore’s Law: Component density increase per year: 1.6 CS6303 – COMPUTER ARCHITECTURE UNIT-I Page 2

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Course Material (Lecture Notes) Processor performance increase: 1.5 more recently 1.2 and < 1.2 Memory capacity improvement: 4/3: 1.33 Tradeoffs in Power versus Clock Rate Faster Clock Rate = Faster processing = More power More transistors = More complexity = More power Example Problems: A disk operates at 7200 Revolutions per minute (RPM). How long does it take to revolve once? 7200 Revs = 1 Rev 60 seconds x secs 7200/60 x = 1 120x = 1 x = 1/120 = 0.00833 second = 8.33milliseconds or 8.33 ms A disk holds 600 GB. How many bytes does it hold? 600 GB = 600 x 230 = 600 x 1,073,741,824 = 644,245,094,400 A LAN operates at 10 Mbps. How long will it take to transfer a packet of 1000 bytes? (Optimistically assuming 100% efficiency) 10 Mb = 8 bits 10 Mb = 8000 1 sec 1 sec x sec x sec 10,000,000x = 8 10,000,000x = 8000 x = 8/10,000,000 = 0.000,000,8 = 800ns x = 8000/10,000,000=8/10,000 1000 x 800 ns = 800us x = 0.0008 = 800us 8 GREAT IDEAS Design for Moore’s Law one constant for computer designers is rapid change, which is driven largely by Moore's Law. It states that integrated circuit resources double every 18–24 months. Moore's Law resulted from a 1965 prediction of such growth in IC capacity made by Gordon Moore, one of the founders of Intel. As computer designs can take years, the resources available per chip can easily CS6303 – COMPUTER ARCHITECTURE UNIT-I Page 3

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Course Material (Lecture Notes) double or quadruple between the start and finish of the project. Like a skeet shooter, computer architects must anticipate where the technology will be when the design finishes rather than design for where it starts. We use an "up and to the right" Moore's Law graph to represent designing for rapid change. Use abstraction to simplify design . Both computer architects and programmers had to invent techniques to make themselves more productive, for otherwise design time would lengthen as dramatically as resources grew by Moore's Law. A major productivity technique for hardware and soft ware is to use abstractions to represent the design at different levels of representation; lower-level details are hidden to off er a simpler model at higher levels. We'll use the abstract painting icon to represent this second great idea Make the common case fast . Making the common case fast will tend to enhance performance better than optimizing the rare case. Ironically, the common case is oft en simpler than the rare case and hence is oft en easier to enhance. This common sense advice implies that you know what the common case is, which is only possible with careful experimentation and measurement. We use a sports car as the icon for making the common case fast, as the most common trip has one or two passengers, and it's surely easier to make a fast sports car than a fast minivan Performance via parallelism Since the dawn of computing, computer architects have offered designs that get more performance by performing operations in parallel. We'll see many examples of CS6303 – COMPUTER ARCHITECTURE UNIT-I Page 4

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Course Material (Lecture Notes) parallelism in this book. We use multiple jet engines of a plane as our icon for parallel performance. Performance via pipelining Following the saying that it can be better to ask for forgiveness than to ask for permission, the next great idea is prediction. In some cases it can be faster on average to guess and start working rather than wait until you know for sure, assuming that the mechanism to recover from a misprediction is not too expensive and your prediction is relatively accurate. We use the fortune-teller's crystal ball as our prediction icon. Performance via prediction A particular pattern of parallelism is so prevalent in computer architecture that it merits its own name: pipelining. For example, before fire engines, a "bucket brigade" would respond to a fire, which many cowboy movies show in response to a dastardly act by the villain. Th e townsfolk form a human chain to carry a water source to fi re, as they could much more quickly move buckets up the chain instead of individuals running back and forth. Our pipeline icon is a sequence of pipes, with each section representing one stage of the pipeline. Hierarchy of memories Programmers want memory to be fast, large, and cheap, as memory speed often shapes performance, capacity limits the size of problems that can be solved, and the cost of memory today is often the majority of computer cost. Architects have found that they can address these conflicting demands with a hierarchy of memories, with the fastest, smallest, and most expensive memory per bit at the top of the hierarchy and the slowest, largest, and cheapest per bit at the bottom. Caches give the programmer the illusion that main memory is nearly as fast as the top of the hierarchy and nearly as big and cheap as CS6303 – COMPUTER ARCHITECTURE UNIT-I Page 5

Lecture Notes