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Note for Advanced Computer Architecture - ACA by Akash Sharma

  • Advanced Computer Architecture - ACA
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  • Information Technology Engineering
  • B.Tech
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EC 6009 ww ADVANCED COMPUTER ARCHITECTURE 3003 1. Aim and Objective of the subject w.L  Understand the micro-architectural design of processors  Learn about the various techniques used to obtain performance ect improvement and power savings in current processors  ure To familiarize the students with Instruction Level Parallelism and Data-Level Parallelism no tes  To expose the students to the concept of Thread Level Parallelism  To familiarize the students with Memory and I/O .in 2. Need and Importance for the study of the subject  Evaluate performance of different processor architectures with respect to various parameters  Analyze performance of different Instruction Level Parallelism techniques  Evaluate performance of Data-Level Parallelism andThread Level Parallelism  Identify cache and memory related issues in multi-processors 3. Industry Connectivity and Latest Developments  Latest processor’s architecture in computers (SMT, CMP, Intel i7 Processor’s) are analyzed.  VLIW and Vector architectures play a vital role in industries 4. Industry Visit (Planned if any) --NIL--- 3

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SCAD GROUP OF INSTITUTIONS DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING Detailed Lesson Plan Name of the Subject & Code : EC6009 Advanced Computer Architecture Name of the Faculty: 1. Mr.R.Kabilan, AP/ECE, FXEC 2. Mr.G. Jayaraman, AP/ECE, FXEC 3. Mr.B.Pradheep T Rajan, AP/ECE, FXEC ww TEXT BOOK: w.E 1. John L Hennessey and David A Patterson, “Computer Architecture A Quantitative Approach”, Morgan Kaufmann/ Elsevier, Fifth Edition, 2012. REFERENCES: asy 1. Kai Hwang and Faye Briggs, “Computer Architecture and Parallel Processing”, En Mc Graw-Hill International Edition, 2000. gin 2. Sima D, Fountain T and Kacsuk P, ”Advanced Computer Architectures: A Design Space Approach”, Addison Wesley, 2000. 4 eer ing .ne t

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Downloaded From : www.Lecturenotes.in Si. Unit No 1 I 2 3 4 5 6 I I I I I 7 8 9 10 11 II II II II II 12 II 13 II 14 II 15 II 16 17 18 19 III III III III 20 IV 21 IV 22 IV 23 IV 24 IV 25 IV 26 V 27 28 29 30 V V V V 31 V 32 V Hours Cumulative Books required / Hrs Referred planned UNITI FUNDAMENTALS OF COMPUTER DESIGN Review of Fundamentals of CPU, 3 3 T1 Memory, IO Trends in technology Instructions 1 4 T1 Power, Energy 2 6 T1 Cost 1 7 T1 Dependability 1 8 T1 Performance Evaluation 1 9 T1 UNITII INSTRUCTION LEVEL PARALLELISM ILP concepts, Pipelining overview 1 10 T1 Compiler Techniques for Exposing ILP 2 12 T1 Dynamic Branch Prediction 1 13 T1 Dynamic Scheduling 1 14 T1 Hardware Based Speculation 1 15 T1 Multiple instruction Issue - Static 1 16 T1 scheduling Multi-threading 1 17 T1 Limitations of ILP 1 18 T1 Case Studies 1 19 T1 UNIT III DATA-LEVEL PARAL1LELISM Vector architecture 2 21 T1 SIMD extensions 3 24 T1 Graphics Processing units 2 26 T1 Loop level parallelism 2 28 T1 UNITIV THREAD LEVEL PARALLELISM Symmetric Shared Memory 2 30 T1 Architectures Distributed Shared Memory 2 32 T1 Architectures Performance Issues 1 33 T1 Synchronization 1 34 T1 Models of Memory Consistency 1 35 T1 Case studies: Intel i7 Processor, SMT 2 37 T1 Processor, CMP Processor UNITV MEMORY ANDI/O Cache Performance- Reducing Cache Miss Penalty, Miss Rate, Reducing Hit 3 40 T1 Time Main Memory and Performance 1 41 T1 Memory Technology 1 42 T1 Types of Storage Devices 1 43 T1 Buses 1 44 T1 RAID – Reliability, Availability and 1 45 T1 Dependability I/O Performance Measures 1 46 T1 Topics to be covered Page No. 2-17 17-21 21-26 27-33 33-36 36-44 148-156 156-162 162-167 167-183 183-192 192-202 223-232 213-221 247-254 264-282 282-288 288-315 315-322 366-378 378-386 395-400 386-391 392-395 401-405 78-96 72-78 96-105 D12-35 I16 D44-59 D15-16 Total: 46 Hours 5 Downloaded From : www.Lecturenotes.in

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Downloaded From : UNIT Q. No 1-15 1 2 I II III 3 (i) 3 (ii) 3 (iii) 4 (i) 4 (ii) 5 (i) 5 (ii) 1-15 1 (i) 1 (ii) 2 3 (i) 3 (ii) 4 5 (i) 5 (ii) 1-15 1 2 3 4 5 (i) 5 (ii) 1-15 IV 1 2 3 4 5 1-15 V 1 2 (i) 2 (ii) 3 4 5 INDEX TITLE Page No Part A 7-10 Part B Components of a computer system 11 CPU performance equation and factors that affect the performance 15 of a computer Uniprocessors, multiprocessors and performance chart 18 Power wall 19 Fundamentals of computer Design 19 Technology trends in computer industry 21 Trends in Cost, Price for building computer over time 23 Design alternatives using the CPU performance equation 25 Clock rate target for a best design 26 Part A 27-29 Part B Multithreading 30 Comparison of hardware and software speculation mechanisms 33 Hardware based speculation to overcome the control dependencies 33 Compiler techniques for exploiting Instruction Level Parallelism 37 Explain the various dynamic branch prediction schemes 39 Dynamic Scheduling, Tomosulo’s approach. 43 Concept of ILP with dependencies in ILP. 49 Limitations of ILP 52 Part A 54-56 Part B Loop Level Parallelism? 57 SIMD extensions exploit data-level parallelism 64 Vector Architectures of data-level parallelism. 67 Graphics Processing Units and its Programming 75 Arithmetic intensity of kernel, Convert loop into VMIPS assembly 84 code Detection and enhancement of Loop Level Parallelism 86 Part A 90-92 Part B Symmetric shared memory architecture. 93 Distributed shared memory, NUMA architecture 97 Synchronization process used in multiprocessor system 102 Needs and types of memory consistency models 105 CMP and SMT architecture and its performance 108 113Part A 115 Part B Cache optimization scheme. 116 Hit time reduction techniques to improve cache performance 124 Methods to measure the performance of I/O 128 Main memory performance? 130 RAID architecture 137 Types of storage devices. 145 Previous University Question Papers 149-164 6 Downloaded From :

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