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Note of Electronics by Aman Kumar

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UNIT: 3: Operational Amplifier (Op-Amp) (Remedial students)  Differential Amplifier Circuit. Differential Amplifier Circuit: Symbol: As the name indicates Differential Amplifier is a dc-coupled amplifier that amplifies the difference between two input signals. It is the building block of operational amplifiers (op-amp).The simplest form of differential amplifier can be constructed using Bipolar Junction Transistors as shown in the above circuit diagram. It is constructed using two matching transistors (Q1 and Q2) in common emitter configuration whose emitters are tied together. Supply voltage VCC and VEE applied to collector and emitter terminals of transistor. Vi1 and Vi2 are input terminals and Vo1 and Vo2 are output terminals with respect to ground.  Mode of Operation of Differential Amplifier Circuit. a. Single Input Unbalanced Output b. Single Input Balanced Output c. Dual Input Unbalanced Output d. Common mode operation (a) Single Input Unbalanced Output: In this case, only one input signal is given and the output is taken from only one of the two collectors with respect to ground as shown below. 2|BY RSS IMSEC GZB

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UNIT: 3: Operational Amplifier (Op-Amp) (Remedial students) When input signal Vin1 is applied to the transistor Q1, its amplified and inverted voltage gets generated at the collector of the transistor Q1. At the same time its amplified and non-inverted voltage gets generated at the collector of the transistor Q2 as shown in the above diagram. (b) Single Input balanced Output: In this mode, only one input signal is given and the output is taken from both collectors.   This will give us more amplified version of output as it is combining the effect of both transistors. Vo = Vo1 – Vo2 (c) Dual Input Unbalanced Output: Both inputs are given in this case i.e. differential input but the output is taken from only one of the two collectors with respect to ground as shown below. Amplified version of difference in both signals will be available at the output. The voltage gain is half the gain of the dual input, balanced output differential amplifier. (d) Common Mode Operation: Dual input balanced output differential amplifier should suppress the common signals present at its inputs. A differential amplifier is said to be in common mode when same signal is applied to both inputs and the expected output will be zero, i.e. ideally common mode gain is zero. 3|BY RSS IMSEC GZB

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UNIT: 3: Operational Amplifier (Op-Amp) (Remedial students)  Parameters of Op-Amp Differential gain (Ad): It is the ratio of output voltage to the difference of input voltage (Vd)      Where Ad in (dB) = 20 Ideally output should be infinite (Vo So, Ad should be infinite Ad ) Common mode gain (Ac) : Common mode gain is ratio of output voltage to common voltage.      Vc is average value of input signal called common voltage Common voltage present due to presence of noise, noise is common to both input signal. So, output should be zero due to presence of noise, Vo’’ due to noise should be zero So Ac zero (ideally) Vo’’=Ac ×Vc Total output voltage Vo = Vo’’+Vo’ Vo =AdVd+AcVc 4|BY RSS IMSEC GZB

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UNIT: 3: Operational Amplifier (Op-Amp) (Remedial students) CMRR (Common mode rejection ratio) : CMRR is ratio of differential gain (Ad) to the common gain (Ac) .   CMRR (dB) = 20   CMRR is the ability of differential amplifier to reject the common mode signal (noise) successfully. Ideally CMRR because Ad Input offset voltage (Vios): Ideally for a zero input voltage, the Op-Amp output voltage should be zero. Practically it is not so .This is due to the unavoidable unbalances inside the op-amp so we have to apply small differential voltage at the input of the op-amp to make the output voltage zero which is called as input offset voltage. Ideally, Input offset voltage should be zero Output offset voltage (Vos): Ideally for a zero input voltage, the Op-Amp output voltage should be zero. Practically it is not so. This is due to the unavoidable unbalances inside the op-amp. This output is known as output off-set voltage. Ideally, Output offset voltage should be zero PSRR (Power supply rejection ratio): The change in an op-amp input offset voltage caused by variation in the supply voltage is called as power supply rejection ratio PSRR.  PSRR = = Change in input offset voltage / change in supply voltage  PSRR ideally should be zero. Input offset current (Iios): The algebraic difference between the current following into the inverting and non - inverting terminals of op-amp is called input offset current.   Ideally should be zero. Input bias current (Ib): Input bias current is the average of the current flowing into the inverting and noninverting terminals o op-amp   Ideally should be zero. Slew Rate (SR): It is defined as the maximum rate of change of output voltage per unit time.    Its unit is volt/µs. S.R = |dVo/dt| max Assume that output voltage 5|BY RSS IMSEC GZB

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