Note for Digital Signal Processing - DSP By Mallik Kgl
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Lecture 10a: Digital Signal Processors: A TI Architectural History Collated by: Professor Kurt Keutzer Computer Science 252, Spring 2000 With contributions from: Dr. Brock Barton, Clark Hise TI; Dr. Surendar S. Magar, Berkeley Concept Research Corporation 1
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DSP ARCHITECTURE EVOLUTION Application Examples Multipliers (MUL) Multiprocessors (MP) Multi-Processing Video/Imaging W-CDMA Radars Digital Radios High-End Control DSP Building Blocks & Bit Slice Processors (MUL, etc.) DSP P and RISC ( MP ) Modems Voice Coding Instruments Low-End Modems Function/Application Specific ( MP) C and Analog P Industrial Control 1980 1985 1990 1995 2
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DSP ARCHITECTURE Enabling Technologies Approach Time Frame Primary Application Enabling Technologies • • Bipolar SSI, MSI FFT algorithm • • Single chip bipolar multiplier Flash A/D Early 1970’s • Discrete logic • Late 1970’s • Building block • • • Non-real time procesing Simulation Military radars Digital Comm. Early 1980’s • Single Chip DSP P • • Telecom Control • • P architectures NMOS/CMOS Late 1980’s • Function/Application specific chips • • Computers Communication • • Vector processing Parallel processing Early 1990’s • Multiprocessing • Video/Image Processing • • Late 1990’s • Single-chip multiprocessing • • Wireless telephony Internet related • • Advanced multiprocessing VLIW, MIMD, etc. Low power single-chip DSP Multiprocessing 3
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Texas Instruments TMS320 Family Multiple DSP P Generations First Sample Bit Size Clock speed (MHz) Instruction Throughput MAC execution (ns) MOPS Device density (# of transistors) Uniprocessor Based (Harvard Architecture) TMS32010 1982 16 integer 20 5 MIPS 400 5 58,000 (3) TMS320C25 1985 16 integer 40 10 MIPS 100 20 160,000 (2) TMS320C30 1988 32 flt.pt. 33 17 MIPS 60 33 695,000 (1) TMS320C50 1991 16 integer 57 29 MIPS 35 60 1,000,000 (0.5) TMS320C2XXX 1995 16 integer 40 MIPS 25 80 Multiprocessor Based TMS320C80 1996 32 integer/flt. MIMD TMS320C62XX 1997 16 integer 5 2 GOPS 120 MFLOP 20 GOPS TMS310C67XX 1997 32 flt. pt. 5 1 GFLOP VLIW 1600 MIPS VLIW 4
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