×
Failure will never overtake me if my determination to succeed is strong enough.
--Your friends at LectureNotes
Close

DIGITAL LOGIC DESIGN

by Shreyansh Shankhdhar
Type: NoteSpecialization: Electronics and Communication EngineeringViews: 20Uploaded: 8 months agoAdd to Favourite

Touch here to read
Page-1

DIGITAL LOGIC DESIGN by Shreyansh Shankhdhar

Topic:
Shreyansh Shankhdhar
Shreyansh Shankhdhar

/ 227

Share it with your friends

Suggested Materials

Leave your Comments

Digital Logic Design Version 4.6 printed on February 2016 First published on August 2006
Background and Acknowledgements This material has been developed for the first course in Digital Logic Design. The content is derived from the author’s educational, technical and management experiences, in-addition to teaching experience. Many other sources, including the following specific sources, have also informed by the content and format of the following material: Katz, R. Contemporary Logic Design. (2005) Pearson. Wakerly, I. Digital Design. (2006) Prentice Hall. Sandige, R. Digital Design Essentials. (2002) Prentice Hall. Nilsson, J. Electrical Circuits. (2004) Pearson. I would like to give special thanks to my students and colleagues for their valued contributions in making this material a more effective learning tool. I invite the reader to forward any corrections, additional topics, examples and problems to me for future Thanks, Izad Khormaee www.EngrCS.com © 2014 Izad Khormaee, All Rights Reserved. Digital Logic Design Page 2
Contents Chapter 1. Number Systems, Number Representations, and Codes ................................................ 6 1.1. Key concepts and Overview ............................................................................................................. 6 1.2. Digital vs. Analog .............................................................................................................................. 7 1.3. Digital Design Overview (from Transistor to Super Computer) ........................................................ 9 1.4. Design Methodologies .................................................................................................................... 11 1.5. Number Systems (Decimal, Binary, Octal, Hexadecimal) .............................................................. 12 1.6. Base Conversions ........................................................................................................................... 14 1.7. Signed Binary Number Conventions .............................................................................................. 17 1.8. Binary Arithmetic ............................................................................................................................. 20 1.9. Binary Codes .................................................................................................................................. 22 1.10. DC Electrical Circuit Fundamentals .............................................................................................. 24 1.11. Additional Resources .................................................................................................................... 28 1.12. Problems ....................................................................................................................................... 29 Chapter 2. Boolean Algebra, Functions, and Minimization .............................................................. 30 2.1. Key concepts and Overview ........................................................................................................... 30 2.2. Logic Gates ..................................................................................................................................... 31 2.3. Huntington’s First Set of Postulates ............................................................................................... 34 2.4. Principle of Duality .......................................................................................................................... 35 2.5. Boolean Functions .......................................................................................................................... 36 2.6. Boolean Algebra Theorems ............................................................................................................ 38 2.7. Canonical or Standard Form of Functions ....................................................................................... 41 2.8. Methods of Function Minimization (reducing the number of literals in an expression) .................. 46 2.9. Karnaugh-map or K-map ................................................................................................................ 48 2.10. Special Case: “Don’t Care” Terms ................................................................................................ 52 2.11. XOR Properties and Applications ................................................................................................. 53 2.12. Additional Resources .................................................................................................................... 54 2.13. Problems ....................................................................................................................................... 55 Chapter 3. Analyzing and Synthesizing Combinational Logic Circuits .......................................... 56 3.1. Key concepts and Overview ........................................................................................................... 56 3.2. Standard Logic and Schematic Layout (Review) ........................................................................... 57 3.3. Designing Logic Circuits ................................................................................................................. 62 3.4. Combinational Logic Analysis and Design ..................................................................................... 66 3.5. Compressing Truth Tables and K-maps ......................................................................................... 67 3.6. Glitches and Their Causes ............................................................................................................. 71 3.7. Types of Functions and Delays ...................................................................................................... 74 3.8. Beyond Standard Logic: Applications ............................................................................................. 76 3.9. Programmable Logic Devices (PLDs) ............................................................................................ 85 3.10. Additional Resources .................................................................................................................... 94 3.11. Problems ...................................................................................................................................... 95 Chapter 4. 4.1. 4.2. 4.3. 4.4. 4.5. 4.6. 4.7. Introduction to Feedback Circuits and Sequential Logic Analysis ........................... 96 Key concepts and Overview ........................................................................................................... 96 SR Flip-Flops .................................................................................................................................. 97 Asynchronous Sequential Logic Issues .......................................................................................... 99 Finite State machine ..................................................................................................................... 101 Additional Flip Flops ..................................................................................................................... 107 Sequential Circuit Analysis ........................................................................................................... 112 Debouncing Mechanical Switches ................................................................................................ 118 Digital Logic Design Page 3
4.8. Additional Resources .................................................................................................................... 120 4.9. Problems ....................................................................................................................................... 121 Chapter 5. 5.1. 5.2. 5.3. 5.4. 5.6. 5.7. 5.8. Chapter 6. 6.1. 6.2. 6.3. 6.4. 6.5. 6.6. Sequential Circuit Design & Techniques .................................................................... 122 Key concepts and Overview ......................................................................................................... 122 Synchronous Finite State Machine Design (Classical Design) .................................................... 123 State Assignment Encoding, Shift Register Counters, and Adding an Enable Input ................... 133 Inspection Design Methods for Finite State Machines ................................................................. 137 FSM Design Examples ................................................................................................................. 143 Additional Resources .................................................................................................................... 151 Problems ....................................................................................................................................... 152 Finite State Machine Optimization & Testing ............................................................ 153 Key concepts and Overview ......................................................................................................... 153 State Minimization and FSM Design Process .............................................................................. 154 State Minimization Using an Implication Chart (or Table) ............................................................ 155 Design for Testability (DFT) .......................................................................................................... 160 Additional Resources .................................................................................................................... 163 Problems ....................................................................................................................................... 164 Chapter 7 “Verilog”. Verilog Hardware Description Language (Verilog) ...................................... 165 7.1. Key concepts and Overview ......................................................................................................... 165 7.2. History ........................................................................................................................................... 166 7.3. Introduction to Verilog HDL........................................................................................................... 167 7.4. Syntax ........................................................................................................................................... 169 7.5. Assignments ................................................................................................................................. 172 7.6. Operators ...................................................................................................................................... 176 7.7. Types and Variable Declarations .................................................................................................. 178 7.8. Flow Control Statements .............................................................................................................. 180 7.9. Code Modularization ..................................................................................................................... 182 7.10. Additional Resources .................................................................................................................. 183 7.11. Problems ..................................................................................................................................... 184 Chapter 8 “VHDL”. VHDL Hardware Description Language (VHDL) ............................................. 185 8.1. Key concepts and Overview ......................................................................................................... 185 8.2. History ........................................................................................................................................... 186 8.3. Steps in VHDL design................................................................................................................... 187 8.4. Entity and Architecture.................................................................................................................. 189 8.5. Declarations .................................................................................................................................. 191 8.6. Operators ...................................................................................................................................... 198 8.7. Behavioral Design ......................................................................................................................... 200 8.8. Dataflow Design Elements............................................................................................................ 202 8.9. Additional Resources .................................................................................................................... 206 8.10. Problems ..................................................................................................................................... 207 Chapter 9. 9.1. 9.2. 9.3. 9.4. 9.5. 9.6. 9.7. 9.8. Commercial Digital Integrated Circuits and Interface Design .................................. 209 Key concepts and Overview ......................................................................................................... 209 Output Types ................................................................................................................................ 210 Logic Families ............................................................................................................................... 214 Multiplexer (MUX)/DeMultiplexer (DMUX) Design ....................................................................... 215 Adder & Subtractor Design ........................................................................................................... 219 Multiplier Design ........................................................................................................................... 223 Arithmetic Logic Unit (ALU) Design .............................................................................................. 224 Additional Resources .................................................................................................................... 225 Digital Logic Design Page 4

Lecture Notes