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VLSI Design

by Jameer N
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Jameer N
Jameer N
N/P-Channel MOSFET Fabrication By Assoc. Prof Dr. Uda Hashim School of Microelectronic Enginnering KUKUM Test Insert and Scribe-line Metal 2 Passivation Planarisation AlSiCu Spacer BPSG FOX FOX LDD BF2 S/D Implant N-Well P-Well PMOS P+ Substrate As+ S/D Implant NMOS Arsenic Implant N-Well Capacitor 1
The making of transistor • • • • • Circuit design Mask/layout design Mask making and artwork Fabrication process Device testing – for parametric and functional test • Packaging and Reliability Test 2
Mask Design 3
MOSFET Masking Step • • • • Mask 1: Source Drain Mask Mask 2: Gate Mask Mask 3: Contact mask Mask 4: Metallization Mask 4

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