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Note for Analog And Digital Electronics - ADE By vtu rangers

  • Analog And Digital Electronics - ADE
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  • Visvesvaraya Technological University Regional Center - VTU
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Analog and Digital Electronics 15CS32 Module -2 The Basic Gates: Review of Basic Logic gates, Positive and Negative Logic, Introduction to HDL. Combinational Logic Circuits: Sum-of-Products Method, Truth Table to Karnaugh Map, Pairs Quads, and Octets, Karnaugh Simplifications, Don‟t-care Conditions, Product-ofsums Method, Product-ofsums simplifications, Simplification by Quine-McCluskyMethod, Hazards and Hazard covers, HDL Implementation Models. Module – 3 Data-Processing Circuits: Multiplexers, Demultiplexers, 1-of-16 Decoder, BCD to Decimal Decoders, Seven Segment Decoders, Encoders, Exclusive-OR Gates, Parity Generators and Checkers, Magnitude Comparator, Programmable Array Logic, Programmable Logic Arrays, HDL Implementation of Data Processing Circuits. Arithmetic Building Blocks, Arithmetic Logic Unit Flip-Flops: RS Flip-Flops, Gated Flip-Flops, Edge-triggered RS FLIP-FLOP, Edgetriggered D FLIP-FLOPs, Edge-triggered JK FLIP-FLOPs. Module-4 Flip- Flops: FLIP-FLOP Timing, JK Master-slave FLIP-FLOP, Switch Contact Bounce Circuits, Various Representation of FLIP-FLOPs, HDL Implementation of FLIP-FLOP. Registers: Types of Registers, Serial In - Serial Out, Serial In - Parallel out, Parallel In Serial Out, Parallel In - Parallel Out, Universal Shift Register, Applications of Shift Registers, Register implementation in HDL.Counters: Asynchronous Counters, Decoding Gates, Synchronous Counters, Changing the Counter Modulus. Module-5 Counters: Decade Counters, Pre settable Counters, Counter Design as a Synthesis problem, A Digital Clock, Counter Design using HDL. D/A Conversion and A/D Conversion: Variable, Resistor Networks, Binary Ladders, D/A Converters, D/A Accuracy and Resolution, A/D Converter- Simultaneous Conversion, A/D Converter-Counter Method, Dept .of CSE, SJBIT Page 2

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Analog and Digital Electronics 15CS32 Continuous A/D Conversion, A/D Techniques, Dual-slope A/D Conversion, A/D Accuracy and Resolution. Text Books: 1. Anil K Maini, VarshaAgarwal: Electronic Devices and Circuits, Wiley, 2012. 2. Donald P Leach, Albert Paul Malvino&GoutamSaha: Digital Principles and Applications, 7th Edition, Tata McGraw Hill, 2014 Course outcomes: After studying this course, students will be able to: · Acquire knowledge of - JFETs and MOSFETs , Operational Amplifier circuits and their applications - Combinational Logic, Simplification Techniques using Karnaugh Maps, Quine McClusky Technique. - Operation of Decoders, Encoders, Multiplexers, Adders and Subtractors. - Working of Latches, Flip-Flops, Designing Registers, Counters, A/D and D/A Converters · Analyse the performance of - JFETs and MOSFETs , Operational Amplifier circuits - Simplification Techniques using Karnaugh Maps, Quine McClusky Technique. - Synchronous and Asynchronous Sequential Circuits. · Apply the knowledge gained in the design of Counters, Registers and A/D & D/A converters Reference Books: 1. Stephen Brown, ZvonkoVranesic: Fundamentals of Digital Logic Design with VHDL, 2nd Edition,Tata McGraw Hill, 2005. 2. R D Sudhaker Samuel: Illustrative Approach to Logic Design, Sanguine-Pearson, 2010. 3. M Morris Mano: Digital Logic and Computer Design, 10th Edition, Pearson, 2008. Dept .of CSE, SJBIT Page 3

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Analog and Digital Electronics 15CS32 Table of contents Module -1 1.1 Field Effect Transistors: 8 - 42 1.1.1 Junction Field Effect Transistors 1.1.2 MOSFETs 1.1.3 Differences between JFETs and MOSFETs 1.1.4 Biasing MOSFETs 1.1.5 FET Applications 1.1.6 CMOS Devices. 1.2. Wave-Shaping Circuits: 1.2.1 Integrated Circuit(IC) Multivibrators 1.3 Introduction to Operational Amplifier: 1.3.1 Ideal v/s practical Opamp, Performance Parameters 1.4. Operational Amplifier Application Circuits: 1.4.1 Peak Detector Circuit 1.4.2 Comparator 1.4.3 Active Filters 1.4.4 Non-Linear Amplifier 1.4.5 Relaxation Oscillator 1.4.6 Current-To-Voltage Converter 1.4.7 Voltages-To-Current Converter Module -2 2.1 The Basic Gates: 43 - 65 2.1.1 Review of Basic Logic gates 2.1.2 Positive and Negative Logic 2.1.3 Introduction to HDL 2.2 Combinational Logic Circuits: 2.2.1 Sum-of-Products Method 2.2.2 Truth Table to Karnaugh Map 2.2.3 Pairs Quads, and Octets, Karnaugh Simplifications Dept .of CSE, SJBIT Page 4

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Analog and Digital Electronics 15CS32 2.2.4 Don‟t-care Conditions, Product-of-sums Method 2.2.5 Product-ofsums simplifications 2.2.6 Simplification by Quine-McCluskyMethod 2.2.7Hazards and Hazard covers 2.2.8 HDL Implementation Models Module – 3 3.1 Data-Processing Circuits: 66 - 89 3.1.1 Multiplexers, Demultiplexers 3.1.2 1-of-16 Decoder 3.1.3 BCD to Decimal Decoders 3.1.4 Seven Segment Decoders 3.1.5 Encoders 3.1.6 Exclusive-OR Gates 3.1.7 Parity Generators and Checkers 3.1.8 Magnitude Comparator 3.1.9 Programmable Array Logic 3.1.10 Programmable Logic Arrays 3.1.11 HDL Implementation of Data Processing Circuits 3.1.12 Arithmetic Building Blocks 3.1.13 Arithmetic Logic Unit 3.2 Flip-Flops: 3.2.1 RS Flip-Flops 3.2.2 Gated Flip-Flops 3.2.3 Edge-triggered RS FLIP-FLOP 3.2.4 Edge triggered D FLIP-FLOPs 3.2.5 Edge-triggered JK FLIP-FLOPs Dept .of CSE, SJBIT Page 5

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