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Note for VLSI Design - VLSI By JNTU Heroes

  • VLSI Design - VLSI
  • Note
  • Jawaharlal Nehru Technological University Anantapur (JNTU) College of Engineering (CEP), Pulivendula, Pulivendula, Andhra Pradesh, India - JNTUACEP
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INTRODUCTION TO VLSI DESIGN 1.1 INTRODUCTION The word digital has made a dramatic impact on our society. More significant is a continuous trend towards digital solutions in all areas –from electronic instrumentation, control, data manipulation, signals processing, tele communications, etc., to consumer electronics. Development of such solutions has been possible due to good digital system design and modeling techniques. 1.1.1 VLSI DESIGN The complexity of VLSI being designed and designed and used today makes the manual approach to design impractical. Design automation is the order of the day. With the rapid technological developments in the last two decades, the status of VLSI technology is characterized by the following: 1

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 A steady increase in the size and hence the functionality of the ICs.  A steady reduction in feature size and hence increase in the speed of operation as well as gate or transistor density.  A steady improvement in the predictability of circuit behavior.  A steady increase in the variety and size of software tools for VLSI design. The above developments have resulted in a proliferation of approaches to VLSI design. 1.1.2 VLSI DESIGN FLOW The design process, at various levels, is usually evolutionary in nature. It starts with a given set of requirements. Initial design is to be developed and test impact analyst must be considered. The Y-chart (first introduced by D. Gajski) is shown in below figure1 illustrates a design flow for most logic chips, using design activities on the three different axes (domains). Y chart of three major domains, they are:  Behavioral domain  Structural domain  Geometrical layout domain 2

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Figure 1 Typical VLSI design flow in three domains (Y-chart representation) The design flow starts from the algorithm that describes the behavior of the target chip. The corresponding architecture of the processor is first defined. It is mapped onto the chip surface by floor planning. The next design evolution in the behavioral domain defines finite state machines (FSMs) which are structurally implemented with functional modules such as registers and arithmetic logic units (ALUs). These modules are then geometrically placed onto the chip surface using CAD tools for automatic module placement followed by routing, with a goal of minimizing inter- connects area and signal delays. The third evolution starts with a behavioral module description. Individual modules are then implemented with leaf cells. At this stage the chip is described in terms of logic gates (leaf cells), which can be placed and interconnected by using a cell placement & routing program. The last evolution involves a detailed Boolean description of leaf cells followed by a transistor level implementation of leaf cells and mask generation. In standard-cell based design, leaf cells are already pre-designed and stored in a library for logic design use. 3

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1.1.3 ABSTRACTION MODEL The model divides the whole design cycle into various domains (see figure 2) with such an abstraction through a division process the design is carried out in different layers. The designer at one layer can function without bothering about the layers above or below. The thick horizontal lines separating the layers in the figure signify the compartmentalization. As an example, le us consider design at the gate level. The circuit to be designed would be described in terms of truth tables and static tables. With these as available inputs, he has to express them as Boolean logic equation and realize them i8n terms of gates and flip-flops. In turn these form the inputs to the layer immediately below. Compartmentalization of the approach to design in the manner described here is the essence of abstraction; it is the basics for the development and d use of CAD tools in the design at various levels. 1.1.4 ASIC DESIGN FLOW As with any other technical activity, development of an ASIC starts with an idea and takes tangible shape through the stages of development as shown in figure 3 and shown in detail in figure 4.The first step in the process is to expand the idea in terms of behavior of the target circuit. Through stages of programming, the same is fully developed into a design description- in terms of well defined standard constructs and conventions. 4

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