instantiation statements (that represent structure), concurrent signal assignment
statements (that represent dataflow), and process statements (that represent behavior).
Basic Language Elements
An identifier in VHDL is composed of a sequence of one or more characters. A legal
character is an upper-case letter (A... Z), or a lower-case letter (a. .. z), or a digit (0 . . . 9)
or the underscore ( _ ) character. The first character in an identifier must be a letter and
the last character may not be an underscore. Lower-case and upper-case letters are
considered to be identical when used in an identifier; as an example. Count, COUNT, and
CouNT, all refer to the same identifier. Also,-two underscore characters cannot appear
consecutively. Some more examples of identifiers are
DRIVE_BUS SelectSignal RAM_Address
SET_CK_HIGH CONST32_59 r2d2
Comments in a description must be preceded by two consecutive hyphens (-); the
comment extends to the end of the line. Comments can appear anywhere within a
description. Examples are
--This is a comment; it ends at the end of this line.
--To continue a comment onto a second line, separate 2 hyphens
The language defines a set of reserved words; such as integer, real, etc.These words, also
called keywords, have a specific meaning in the language, and therefore, cannot be used
A data object holds a value of a specified type. It is created by means of an object
declaration. An example is
variable COUNT: INTEGER;
This results in the creation of a data object called COUNT which can hold integer values.
The object COUNT is also declared to be of variable class.