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Note for Power Electronics - PE By Amity Kumar

  • Power Electronics - PE
  • Note
  • Amity University - AMITY
  • Electronics and Communication Engineering
  • 7 Topics
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The difference in the two structures is obvious. A power transistor is a vertically oriented four layer structure of alternating p-type and n-type. The vertical structure is preferred because it maximizes the cross sectional area and through which the current in the device is flowing. This also minimizes on-state resistance and thus power dissipation in the transistor. The doping of emitter layer and collector layer is quite large typically 1019 cm-3. A special layer called the collector drift region (n-) has a light doping level of 1014. The thickness of the drift region determines the breakdown voltage of the transistor. The base thickness is made as small as possible in order to have good amplification capabilities, however if the base thickness is small the breakdown voltage capability of the transistor is compromised. Practical power transistors have their emitters and bases interleaved as narrow fingers as shown. The purpose of this arrangement is to reduce the effects of current crowding. This multiple emitter layout also reduces parasitic ohmic resistance in the base current path which reduces power dissipation in the transistor. Fig. 2 STEADY STATE CHARACTERISTICS Figure 3(a) shows the circuit to obtain the steady state characteristics. Fig 3(b) shows the input characteristics of the transistor which is a plot of I B versus VBE . Fig 3(c) shows the output characteristics of the transistor which is a plot I C versus VCE . The characteristics shown are that for a signal level transistor. The power transistor has steady state characteristics almost similar to signal level transistors except that the V-I characteristics has a region of quasi saturation as shown by figure 4. 2

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Fig. 3: Characteristics of NPN Transistors 3

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Quasi-saturation - 1/Rd Hard Saturation Second breakdown iC IB5>IB4,etc. IB5 IB4 IB3 Active region Primary breakdown IB2 IB1 0 I B<0 IB=0 IB=0 BVSUS vCE BVCEO BVCBO Fig. 4: Characteristics of NPN Power Transistors There are four regions clearly shown: Cutoff region, Active region, quasi saturation and hard saturation. The cutoff region is the area where base current is almost zero. Hence no collector current flows and transistor is off. In the quasi saturation and hard saturation, the base drive is applied and transistor is said to be on. Hence collector current flows depending upon the load. The power BJT is never operated in the active region (i.e. as an amplifier) it is always operated between cutoff and saturation. The BVSUS is the maximum collector to emitter voltage that can be sustained when BJT is carrying substantial collector current. The BVCEO is the maximum collector to emitter breakdown voltage that can be sustained when base current is zero and BVCBO is the collector base breakdown voltage when the emitter is open circuited. The primary breakdown shown takes place because of avalanche breakdown of collector base junction. Large power dissipation normally leads to primary breakdown. The second breakdown shown is due to localized thermal runaway. This is explained in detail later. 4

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TRANSFER CHARACTERISTICS Fig. 5: Transfer Characteristics I E  IC  I B   h fE  IC IB I C   I B  I CEO   1   1  TRANSISTOR AS A SWITCH The transistor is used as a switch therefore it is used only between saturation and cutoff. From fig. 5 we can write the following equations Fig. 6: Transistor Switch 5

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