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- DIGITAL LOGIC DESIGN - DESIGN
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UNIT-II COMBINATIONAL CIRCUITS 1) What are called don’t care conditions? In some logic circuits certain input conditions never occur, therefore the Corresponding output never appears. In such cases the output level is not defined, it can be either high or low. These output levels are indicated by ‘X’ or‘d’ in the truth tables and are called don’t care conditions or incompletely specified functions. 2) What is a prime implicant? A prime implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map. 3) What is an essential implicant? If a min term is covered by only one prime implicant, the prime implicant is said to be Essential. 4) Define combinational logic. When logic gates are connected together to produce a specified output for certain specified combinations of input variables, with no storage involved, the resulting circuit is called combinational logic. 5) Write the design procedure for combinational circuits. The problem definition Determine the number of available input variables & required O/P variables. Assigning letter symbols to I/O variables Obtain simplified Boolean expression for each O/P. Obtain the logic diagram. 6) Define half adder and full adder. The logic circuit that performs the addition of two bits is a half adder. The circuit that Performs the addition of three bits is a full adder. 7) Define Decoder. A decoder is a multiple - input multiple output logic circuit that converts coded inputs into coded outputs where the input and output codes are different. 8) What is binary decoder? A decoder is a combinational circuit that converts binary information from n input lines to a maximum of 2n out puts lines. 9) Define Encoder. An encoder has 2n input lines and n output lines. In encoder the output lines generate the binary code corresponding to the input value. 10) What is priority Encoder? A priority encoder is an encoder circuit that includes the priority function. In priority encoder, if 2 or more inputs are equal to 1 at the same time, the input having the highest priority will take precedence. 12) Define multiplexer. Multiplexer is a digital switch. If allows digital information from several sources to be routed onto a single output line. 13) What do you mean by comparator? A comparator is a special combinational circuit designed primarily to compare the relative magnitude of two binary numbers. 14) Write down the steps in implementing a Boolean function with levels of NAND Gates. www.studentsfocus.com

Simplify the function and express it in sum of products. Draw a NAND gate for each product term of the expression that has at least two Literals. The inputs to each NAND gate are the literals of the term. This constitutes a group of first level gates. Draw a single gate using the AND-invert or the invert- OR graphic symbol in the second level, with inputs coming from outputs of first level gates. A term with a single literal requires an inverter in the first level. How ever if the single literal is complemented, it can be connected directly to an input of the second level NAND gate. 15) Give the general procedure for converting a Boolean expression in to multilevel NAND diagram? Draw the AND-OR diagram of the Boolean expression. Convert all AND gates to NAND gates with AND-invert graphic symbols. Convert all OR gates to NAND gates with invert-OR graphic symbols. Check all the bubbles in the same diagram. For every bubble that is not compensated by another circle along the same line, insert an inverter or complement the input literal. PART-B 1) i) Realize a JK flip flop using SR flip flop. (8) ii) Realize a SR flip flop using NAND gates and explain its operation. (8) 2) Explain various steps in the analysis of synchronous sequential circuits with suitable example. 3) i) Distinguish between a combinational logic circuit and a sequential logic circuit. (4) ii) Derive the characteristic equation of SR flip flop T1 PG 257. (8) iii) Using a JK flip flop, explain how a D flip flop can be obtained. (4) 4) Design a four state down counter using T flip flop. (16) 5) Design a 4-bit synchronous 8421 decade counter with ripple carry. (16) 6) Design a synchronous 3-bit gray code up counter with the help of excitation table. (16) 7) Describe the input and output action of JK master/slave flip flops. (16) 8) Design a MOD-10 synchronous counter using JK flip flops. (16) 9) Realize SR neither flip flop using NOR gates and explain its operation. (16) www.studentsfocus.com

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