THANTHAI PERIYAR GOVT. INSTITUTE OF TECHNOLOGY Vellore - 632002 Department of ECE Regulation-2017 EC8392 DIGITAL ELECTRONICS R.BHARATHIRAJA,M.E ASST.PROFESSOR
EC8392 DIGITAL ELECTRONICS L 3 OBJECTIVES: T 0 P 0 C 3 To present the Digital fundamentals, Boolean algebra and its applications in digital systems To familiarize with the design of various combinational digital circuits using logic gates To introduce the analysis and design procedures for synchronous and asynchronous sequential circuits To explain the various semiconductor memories and related technology To introduce the electronic circuits involved in the making of logic gates UNIT I DIGITAL FUNDAMENTALS 9 Number Systems – Decimal, Binary, Octal, Hexadecimal, 1‘s and 2‘s complements, Codes – Binary, BCD, Excess 3, Gray, Alphanumeric codes, Boolean theorems, Logic gates, Universal gates, Sum of products and product of sums, Minterms and Maxterms, Karnaugh map Minimization and Quine-McCluskey method of minimization. UNIT II COMBINATIONAL CIRCUIT DESIGN 9 Design of Half and Full Adders, Half and Full Subtractors, Binary Parallel Adder – Carry look ahead Adder, BCD Adder, Multiplexer, Demultiplexer, Magnitude Comparator, Decoder, Encoder, Priority Encoder. UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS 9 Flip flops – SR, JK, T, D, Master/Slave FF – operation and excitation tables, Triggering of FF, Analysis and design of clocked sequential circuits – Design - Moore/Mealy models, state minimization, state assignment, circuit implementation – Design of Counters- Ripple Counters, Ring Counters, Shift registers, Universal Shift Register. UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS 9 Stable and Unstable states, output specifications, cycles and races, state reduction, race free assignments, Hazards, Essential Hazards, Pulse mode sequential circuits, Design of Hazard free circuits. UNIT V MEMORY DEVICES AND DIGITAL INTEGRATED CIRCUITS 9 Basic memory structure – ROM -PROM – EPROM – EEPROM –EAPROM, RAM – Static and dynamic RAM - Programmable Logic Devices – Programmable Logic Array (PLA) Programmable Array Logic (PAL) – Field Programmable Gate Arrays (FPGA) - Implementation of combinational logic circuits using PLA, PAL. Digital integrated circuits: Logic levels, propagation delay, power dissipation, fan-out and fanin, noise margin, logic families and their characteristics-RTL, TTL, ECL, CMOS TOTAL: 45 PERIODS
OUTCOMES: At the end of the course: Use digital electronics in the present contemporary world Design various combinational digital circuits using logic gates Do the analysis and design procedures for synchronous and asynchronous sequential circuits Use the semiconductor memories and related technology Use electronic circuits involved in the design of logic gates TEXT BOOK: 1. M. Morris Mano and Michael D. Ciletti, “Digital Design”, 5th Edition, Pearson, 2014. REFERENCES: Thomas L. Floyd, “Digital Fundamentals”, 10th Edition, Pearson Education Inc, 2011 1. S.Salivahanan and S.Arivazhagan“Digital Electronics”, Ist Edition, Vikas Publishing 2. House pvt Ltd, 2012. Anil K.Maini “Digital Electronics”, Wiley, 2014. 3. 4. A.Anand Kumar “Fundamentals of Digital Circuits”, 4th Edition, PHI Learning Private Limited, 2016. Soumitra Kumar Mandal “ Digital Electronics”, McGraw Hill Education Private Limited, 5. 2016.
CONTENTS S.No Page No 1 Unit I: Digital Fundamentals 1 2 Unit II: Combinational Circuit Design 85 3 Unit III: Synchronous Sequential Circuit Design 107 4 Unit IV: ASynchronous Sequential Circuit Design 157 5 Unit V: Memory Devices and Digital Integrated Circuit 189 6 Question Bank - 7 Previous University Questions -