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S.K.P. Engineering College, Tiruvannamalai VI SEM SKP Engineering College Tiruvannamalai – 606611 A Course Material on Computer Architecture By G.Nanda kumar Assistant Professor Computer Science and Engineering Department Computer Science Engineering Department 1 Computer Architecture

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S.K.P. Engineering College, Tiruvannamalai VI SEM Quality Certificate This is to Certify that the Electronic Study Material Subject Code : CS6303 Subject Name : Computer Architecture Year/Sem: III/VI Being prepared by me and it meets the knowledge requirement of the University curriculum. Signature of the Author Name: G.Nanda kumar Designation: Assistant Professor This is to certify that the course material being prepared by Mr. G.Nanda kumar is of the adequate quality. He has referred more than five books and one among them is from abroad author. Signature of HD Signature of the Principal Name: Name: Dr.V.Subramania Bharathi Seal: Seal: Computer Science Engineering Department 2 Computer Architecture

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S.K.P. Engineering College, Tiruvannamalai CS6303 VI SEM COMPUTER ARCHITECTURE LTPC3003 OBJECTIVES:       To make students understand the basic structure and operation of digital computer. To understand the hardware-software interface. To familiarize the students with arithmetic and logic unit and implementation of fixed point and floating-point arithmetic operations. To expose the students to the concept of pipelining. To familiarize the students with hierarchical memory system including cache memories and virtual memory. To expose the students with different ways of communicating with I/O devices and standard I/O interfaces. UNIT I OVERVIEW & INSTRUCTIONS 9 Eight ideas – Components of a computer system – Technology – Performance – Power wall – Uniprocessors to multiprocessors; Instructions – operations and operands – representing instructions – Logical operations – control operations – Addressing and addressing modes. UNIT II ARITHMETIC OPERATIONS 7 ALU - Addition and subtraction – Multiplication – Division – Floating Point operations – Subword parallelism. UNIT III PROCESSOR AND CONTROL UNIT 11 Basic MIPS implementation – Building datapath – Control Implementation scheme – Pipelining – Pipelined datapath and control – Handling Data hazards & Control hazards – Exceptions. UNIT IV PARALLELISM 9 Instruction-level-parallelism – Parallel processing challenges – Flynn's classification – Hardware multithreading – Multicore processors UNIT V MEMORY AND I/O SYSTEMS 9 Memory hierarchy - Memory technologies – Cache basics – Measuring and improving cache performance - Virtual memory, TLBs - Input/output system, programmed I/O, DMA and interrupts, I/O processors. OUTCOMES: At the end of the course, the student should be able to:  Design arithmetic and logic unit. Computer Science Engineering Department 3 Computer Architecture

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S.K.P. Engineering College, Tiruvannamalai    VI SEM Design and anlayse pipelined control units Evaluate performance of memory systems. Understand parallel processing architectures. TEXT BOOK: 1. David A. Patterson and John L. Hennessey, ―Computer organization and design‟, Morgan Kauffman / Elsevier, Fifth edition, 2014. REFERENCES: 1. V.Carl Hamacher, Zvonko G. Varanesic and Safat G. Zaky, ―Computer Organisation―, VI th edition, Mc Graw-Hill Inc, 2012. 2. William Stallings ―Computer Organization and Architecture‖ , Seventh Edition , Pearson Education, 2006. 3. Vincent P. Heuring, Harry F. Jordan, ―Computer System Architecture‖, Second Edition, Pearson Education, 2005. 4. Govindarajalu, ―Computer Architecture and Organization, Design Principles and Applications", first edition, Tata McGraw Hill, New Delhi, 2005. 5. John P. Hayes, ―Computer Architecture and Organization‖, Third Edition, Tata Mc Graw Hill, 1998. 6. http://nptel.ac.in/. Computer Science Engineering Department 4 Computer Architecture

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