Note for Switching Theory and Logic Design - STLD By bhuvanesh marneni
- Switching Theory and Logic Design - STLD
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Note for Switching Theory and Logic Design - STLD By bhuvanesh marneni
- Switching theory and logic cercuits - ( 1 - 1 )
- Introductory concepts - ( 2 - 6 )
- complements of numbers - ( 7 - 9 )
- codes - ( 10 - 10 )
- Non weighted codes - ( 11 - 19 )
- Boolean laws and theorems - ( 20 - 21 )
- congensus theorem - ( 22 - 22 )
- Realisation of AND gate - ( 23 - 43 )
- Tabulation Method - ( 44 - 53 )
- Prime Implecant chart - ( 54 - 57 )
- Moltiplexer - ( 58 - 72 )
- Implementation of 3 to 8 decoder by using 2 to 4 decoder - ( 73 - 75 )
- BCD to decimal decoder design - ( 76 - 82 )
- Encoders - ( 83 - 84 )
- Arithmatic cercuits - ( 85 - 86 )
- Logic symbol - ( 87 - 88 )
- 4 bit parallel binary adder - ( 89 - 90 )
- BCD adder - ( 91 - 93 )
- code converters - ( 94 - 99 )
- Error detecting codes - ( 100 - 100 )
- error connecting codes - ( 101 - 104 )
- magnitude comparator - ( 105 - 106 )
- 3 bit even parity generator - ( 107 - 107 )
- programmable logic array - ( 108 - 108 )
- pla programming table - ( 109 - 110 )
- Flip flops - ( 111 - 113 )
- race around condition - ( 114 - 117 )
- truth tables and flip flops - ( 118 - 124 )
- 3 bit asynchronous down counter - ( 125 - 132 )
- lock out condition - ( 133 - 136 )
- shift register - ( 137 - 142 )
- synchronous sequential cercuits - ( 143 - 147 )
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