×
DON'T BE SATISFIED WITH B when you can get A+
--Your friends at LectureNotes
Close

Note for Microprocessor and Microcontroller - MPMC by P Praveen Kumar

  • Microprocessor and Microcontroller - MPMC
  • Note
  • JNTU HYDERABAD - JNTUH
  • Electrical and Electronics Engineering
  • B.Tech
  • 153 Views
  • 2 Offline Downloads
  • Uploaded 2 months ago
P Praveen Kumar
P Praveen Kumar
0 User(s)
Download PDFOrder Printed Copy

Share it with your friends

Leave your Comments

Text from page-1

www.jntuworld.com www.jwjobs.net PROGRAMMABLE PERIPHERAL INTERFACE 8255 The 8255 is a PPI which is used for parallel data T/f. It has three 8-bit ports 1. PORT A 2. PORT B 3. PORT C which are arranged in two groups. It can be programmed to operate in three modes: Mode 0, Mode 1, Mode 2. Each port has a unique address, and data can be read from or written to a port, by issuing either an IN or OUT instruction. Operational Modes: Mode 0: Basic Input/output In this mode, port A and port B can be configured as simple 8-bit input or output ports without handshaking. The two halves of port C, PC0 -PC3 and PC4 – PC7 can be programmed separately as 4-bit input or output ports. Mode 1: Strobed Input/output: In this mode, two groups each of 12 pins are formed Ports A and B can be programmed as 8-bit I/O ports with three lines of Port C in each group used for hand shaking. Mode 2: Strobed Bidirectional Bus I/O: This mode allows Bidirectional data T/f over a single 8-bit data bus using handshaking signal. Only Port A can be used as bidirectional port. The hand shaking signals are provided on five lines of port C (PC3 – PC7). Port B can be used in Mode 0 or in Mode1. Bit Set Reset future: In addition to the above modes, individual bits of port C can be set or reset by sending out a single OUT inst. to the control register. www.jntuworld.com

Text from page-2

www.jntuworld.com www.jwjobs.net Data Bus Buffer: The tristate bi-directional buffer is used to inter face the 8255 to the system data bus. IN or OUT inst. executed by the CPU are to either read data form, or write data into the Buffer. Control Logic: The control logic block accepts control bus signals as well as i/ps from the address bus, and issues commands to the individual group control blocks. www.jntuworld.com

Text from page-3

www.jntuworld.com www.jwjobs.net Group A and Group B controls: Each of the group A and group B control Blocks receivers control words from the CPU through the data Buffer and internal data bus, accepts commands from control block, and issues appropriate commands to the ports associated with it. 8255 Programming and Operation: A high on the RESET pin causes all 24 points of three 8-bit ports to be in the input mode. The ports are then programmed for any other mode by sending out a single inst. (OUT) to the control register. Also, the mode can be specified. There are two basic modes of operation www.jntuworld.com

Text from page-4

www.jntuworld.com www.jwjobs.net Bit set/Reset format Control word www.jntuworld.com

Lecture Notes