8086 Overview • • • • • • • • • • • Introduced in 1978. Having Total 40 Pins. Having Address Bus of 20 bit. Having Data Bus of 16 bit. HMOS Microprocessor. Consumes Low Power (i.e. 360 mA on 5v). Clock Frequencies of 5,8 &10 MHz. Contains About 29000 Transistors. Can Address up to 1 Mbytes of Memory. It has more than 20,000 instructions. Microprocessor Notes By, Er. Swapnil V. Kaware Provides fourteen 16-Bit registers.
8086 Architecture Microprocessor Notes By, Er. Swapnil V. Kaware
8086 Internal Architecture • 8086 internal Architecture contains mainly following two units. • (1). BIU (Bus Interface Unit). • (2). EU (Execution Unit). • BIU contains Instruction queue, Segment registers,Instruction pointer,etc. • EU contains Control circuitry, Instruction decoder, ALU,Pointer and Index register, Flag register,etc. Microprocessor Notes By, Er. Swapnil V. Kaware
Bus Interface Unit (BIU) • Following functions are supported by BIU. (1). It provides a full 16 bit bidirectional data bus and 20 bit address bus. (2). It sends address of memory or I/O. (3). It fetches instruction from memory. (4). It reads data from port/memory. (5). It writes data into port/memory. (6). It supports instruction queuing . (7). It makes 8086’s interface to the outside world. (8). The BIU uses a mechanism known as an instruction stream queue to implement a pipeline architecture. (9). If the BIU is already in the process of fetching an instruction when the EU request it to read or write operands from memory or I/O, the BIU first completes the instruction fetch bus cycle before initiating the operand read / write cycle. (10). The BIU also contains a dedicated adder which is used to generate the 20bit physical address. Microprocessor Notes By, Er. Swapnil V. Kaware