Notes for VLSI Design - VLSI by Verified Writer

Historical Perspective, VLSI Design Methodologies, VLSI Design Flow, Design Hierarchy, Concept of Regularity, Modularity and Locality, VLSI Design Styles, Computer-Aided Design Technology

Introduction, Fabrication Processes Flow Basic Concepts, The CMOS n-Well Process, Layout Design Rules, Stick Diagrams, Full-Customs Mask Layout Design

The Metal Oxide Semiconductor MOS Structure, The MOS System under External Bias, Structure and Operation of MOS Transistor MOSFET , MOSFET Current-Voltage Characteristics, MOSFET Scaling and Small-Geometry Effects, MOSFET Capacitance

Introduction, Resistive-Load Inverters, Inverters r nwith n-Type MOSFET Load, CMOS Inverter

MOS Inverter-Switching Characteristics, Interconnect Effects Introduction, r nDelay-Time Definitions, Calculation of Delay-Times, Inverter Design with Delay r nConstraints, Estimation of Interconnect Parasitics, Calculation of Interconnect Delay, r nSwitching Power Dissipation of CMOS Inverters

Introduction, MOS Logic Circuits with Depletion r nnMOS Loads, CMOS Logic Circuits, Complex Logic Circuits, CMOS Transmission Gates r n Pass Gates

Introduction, Behaviour of Bistable Elements, SR Latch r nCircuits, Clocked Latch and Flip-Flop Circuits, CMOS D-Latch and Edge-Triggered FlipFlop

Dynamic Logic Circuits, Introduction, Basic Principles of Pass Transistor Circuits, r nVoltage Bootstrapping, Synchronous Dynamic Circuit Techniques, Dynamic CMOS Circuit r nTechniques, High Performance Dynamic CMOS Circuits

Semiconductor Memories, Introduction, Dynamic Random Access Memory DRAM , r nStatic Random Access Memory SRAM , Non-volatile Memory, Flash Memory

Design for Testability, Introduction, Fault Types and Models, Ad Hoc Testable Design r nTechniques, Scan-Based Techniques, Built-In Self-Test BIST Techniques, Current r nMonitoring IDDQ Test