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Previous Year Exam Questions of Advanced Computer Architecture of bput - ACA by Verified Writer

  • Advanced Computer Architecture - ACA
  • 2017
  • PYQ
  • Biju Patnaik University of Technology Rourkela Odisha - BPUT
  • Information Technology Engineering
  • B.Tech
  • 5059 Views
  • 97 Offline Downloads
  • Uploaded 1 year ago
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Registration no: Total Number of Pages: 02 B.Tech PECS5404 7th Semester Regular/Back Examination 2017-18 Advanced Computer Architecture Branch: IT, ITE Time: 3 Hours Max Marks: 70 Q.CODE: B353 Answer Question No.1 which is compulsory and any five from the rest. The figures in the right hand margin indicate marks. Q1 a) b) c) d) e) f) g) h) i) j) Q2 Q3 Q4 Answer the following questions: Processor A supports X type of instruction set and processor B supports Y type of instruction set. It has been observed that to do a task machine A uses 5 stage pipeline and B uses 7 stage pipeline. If the clock rate of A is 2 times faster than B. Ideal CPI of both the machines supporting pipeline is 1. Find out which machine is faster What is the benefit of placing the extra additional hardware for finding the effective branch address of the control instruction in the decoding phase of the pipeline? “Is RAR a hazard”, Justify with example. (2 x 10) A pipeline system is affected by branch is 3 stall cycles. If 35% of instructions are branch and pipeline is operating with a clock cycle of 10ns providing speed factor is 8, then what will be the number of stages in pipeline system? Give any two examples of Pipelining in our day to day lives. Is Cube network a static or dynamic network? Explain why. When a destructor is called, which portion of the memory gets affected? Differentiate between tightly coupled and loosely coupled multiprocessor. Can Bernstein’s condition totally remove the Hazard in Pipelining? Enlist the consequences of larger caches. a) Explain Amdhal’s law. And thus, prove that frequent codes should be made faster than the nonfrequent one. (5) b) If the web server is enhanced by 1.56 times by modifying it’s processor, which takes 40% of total execution. Then find out the speed up of the modified processor. (5) a) What is structural hazard? Explain the techniques to resolve the structural hazard. (5) b) Explain that anti and output dependences lead to RAW and WAR hazards with examples. (5) a) Describe basic pipelining. And differentiate between arithmetic and instruction pipelining by examples from each. (5) b) Write the meaning of hazards of pipelining. Explain control hazard and techniques to resolve it. (5)

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Q5 a) b) Give 5 examples of static networks and list down their characteristics. What do you mean by cloud computing? How this is beneficial in today’s lives? (5) (5) Q6 a) b) Compare between memory mapped I/O and I/O mapped I/O. Explain cache memory mapping techniques with examples and their consequences. (5) (5) Describe the techniques to enhance average cache access time. (10) Q7 Q8 a) b) c) d) Write short answer on any TWO: Flynn’s classification UMA vs NUMA Unified vs Split cache Paging. (5 x 2)

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