Previous Year Exam Questions for Embedded System Development - ESD of 2018 - IITKGP by Bput Toppers

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Registration No : Total Number of Pages : 01 B.Tech. PECS5408 8th Semester Regular / Back Examination 2017-18 EMBEDDED SYSTEM DEVELOPMENT BRANCH : CSE, IT, ITE Time : 3 Hours Max Marks : 70 Q.CODE : C467 Answer Question No.1 which is compulsory and any FIVE from the rest. The figures in the right hand margin indicate marks. Answer all parts of a question at a place. Q1. a) b) c) d) e) f) g) h) i) j) Answer the following questions: Short answer type : What are the typical characteristics of an embedded system? Define embedded microcontroller. What does UART contain? Define RTOS. What are the applications of an embedded system? Define SoC with an example. Draw the data frame format of CAN. What is rate-monotonic scheduling? Differentiate coarse and fine granularity. Define hardware/software trade-off. Q2. a) b) Explain state transition diagram of RTOS. List the characteristics of hybrid scheduler. (5) (5) Q3. a) b) Differentiate soft and hard RTOS. Consider the following three periodic real-time tasks to be scheduled using EDF on a uniprocessor: T1 = (e1 = 10, p1 = 20), T2 = (e2 = 5, p2 = 50) and T3 = (e3 = 10, p3 = 35). Determine whether the task set is schedulable. Is EDF really a dynamic priority scheduling algorithm? Justify your answer. (5) (5) Q4. a) (5) b) Explain the schedulability test for RMA. Specify the necessary and sufficient condition. With a neat diagram explain the microkernel-based systems. Q5. a) b) Differentiate between SRAM and DRAM. Describe the architecture of a typical microcontroller with a neat diagram. (5) (5) Q6. a) b) Explain general-purpose processor basic architecture with a neat sketch diagram. What is an application-specific integrated circuit? Explain its design and implementation. (5) (5) What do you mean by MISRA C? List out the rules of MISRA C. What are the requirement of partitioning hardware and software in developing embedded application? (10) Q7. Q8. a) b) c) d) Write short answer on any TWO : Flash Memory POSIX-RT Embedded System Development Life Cycle Design for Testability Techniques (2 x 10) (5) (5 x 2)